1. Field of the Invention
The present invention relates generally to integrated circuit packages and in particular to improving the thermal properties of integrated circuit packaging. Still more particularly, the present invention relates to including a thermal mass within an integrated circuit package for dissipating heat during operation.
2. Description of the Prior Art
The size of integrated circuit packages is shrinking while the complexity and density of electronic circuits within such packages is increasing. The processing requirements of integrated circuits may require that large amounts of power be drawn by the integrated circuits over short periods of time. The power which is drawn is generally dissipated as thermal energy (heat). Because the package sizexe2x80x94and therefore the surface areaxe2x80x94of integrated circuit devices is shrinking, dissipation of such heat is slowed. As the heat builds, performance of the integrated circuit may be degraded. External heat sinks or cooling fans, employed in large electronic devices such as computers, cannot be employed to dissipate heat in many contemporary electronic devices, such as wireless phones or handheld electronics devices.
Current or proposed solutions to dissipating heat within packaged integrated circuits are illustrated in FIGS. 3 and 4. In the approach of FIG. 3, a substrate 300 forms the base for an integrated circuit die 302 mounted on substrate 300 using a thin epoxy 304 and connected to substrate 300 by wire bonds 306. A thick layer 308 of epoxy resin or plastic overlies the integrated circuit die 302 and wire bonds 306, over which is placed a preformed pyramidal heat slug 310. An additional plastic or epoxy material 312 is formed over the heat slug 310. With the approach illustrated in FIG. 3, a distance between the integrated circuit die 302 and the heat slug 310, as well as the intervening epoxy or plastic 308 which act as a thermal insulator, constrains the ability of the heat slug 310 to dissipate heat generated by the integrated circuit die 302.
The alternative approach of FIG. 4 employs a substrate 402 supporting a heat sink 404 which contacts the integrated circuit die 406. Bond wires 408 connect the integrated circuit die 406 to conductive traces one the substrate 402, which are connected in turn to solder balls providing contact to other conductive structures on a printed circuit board or the like. The substrate 402, heat sink 404, and integrated circuit die 406 are then encapsulated by a plastic or epoxy packaging material 410. While this approach eliminates the distance and thick insulator between the heat sink 404 and the integrated circuit die 406, input/output is constrained by the inability to place solder ball connections beneath the integrated circuit die 406, limiting the number of input/output connections which may be made to the integrated circuit without also increasing the area (or xe2x80x9cfootprintxe2x80x9d) of the integrated circuit. Additionally, the use of a separate substrate 402 to support heat sink 406 increases the package thickness.
The small form factor required for integrated circuit packages in wireless phones, handheld personal digital assistants, and the like preclude the use of spaced heat sinks and/or separate substrates supporting the heat sink. Chip Scale Packages (CSPs) , characterized by small footprint, thin form factor (1.2 to 1.4 mm total thickness) and high input/output (I/O) capacity, exemplify such integrated circuits.
It would be desirable, therefore, to provide effective heat dissipation within small form factor integrated circuits without reducing I/O capacity.
A heat sink is mounted on an integrated circuit die within a Chip Scale Package, without a substrate supporting the heat sink. The heat sink may be mounted on a central portion of the active surface of the integrated circuit die without impeding wire bond connection of bond pads around peripheral region of the active surface. Alternatively, the heat sink may be mounted on the backside of one integrated circuit die within a stacked configuration of integrated circuits having facing active surfaces. The required form factor for Chip Scale Packages is maintained while providing heat dissipation for high input/output devices. The heat sink may be wire bonded to a ground connection to provide the packaged integrated circuit with shielding from electrical or electromagnetic interference.